Oh, and another fun detail about magnetic core memory is that if you read a value, I.e check to see if one of those magnetic rings is set to 0 or 1, that is a destructive operation
Yeah, this is the same thing with modern RAM. The Magnetic Core Memory is doing roughly the exact same thing modern DRAM is doing. In the MCM it’s magnetic hysteresis that’s holding a bit of magnetic charge, in DRAM it’s a tiny capacitor holding a bit of an electric charge. Either way, the charge is placed into a thing called a sense amplifier. The amplifier is a flip-flop circuit. During the refresh cycle the state of the sense amplifier is written back to the cell whence it came.
Static RAM, SRAM, is the kind of RAM that a read is non-destructive. It’s really expensive (Here’s a 2MB SRAM as an example of cost) and doesn’t do well at really fast clock speeds at the moment. However, SRAM is really simple to interface with (Block diagram on page 1 and you can see you just have Address pins (A0-20), IO pins (I/O0-7), and the control pins that you turn on or off to indicate what the heck you are doing with the chip (CS#, OE#, WE#). Which the OE means output enabled (read) and WE means write enabled (write). See super easy to interface with) and it’s usually what’s used when folks proto circuits that need RAM. It doesn’t matter what your clock speed is nor how you probe the contents of the memory, all of it is non-destructive. But DRAM, is stupid cheap compared to SRAM and handles higher clocks a lot better.
Yeah, this is the same thing with modern RAM. The Magnetic Core Memory is doing roughly the exact same thing modern DRAM is doing. In the MCM it’s magnetic hysteresis that’s holding a bit of magnetic charge, in DRAM it’s a tiny capacitor holding a bit of an electric charge. Either way, the charge is placed into a thing called a sense amplifier. The amplifier is a flip-flop circuit. During the refresh cycle the state of the sense amplifier is written back to the cell whence it came.
Static RAM, SRAM, is the kind of RAM that a read is non-destructive. It’s really expensive (Here’s a 2MB SRAM as an example of cost) and doesn’t do well at really fast clock speeds at the moment. However, SRAM is really simple to interface with (Block diagram on page 1 and you can see you just have Address pins (A0-20), IO pins (I/O0-7), and the control pins that you turn on or off to indicate what the heck you are doing with the chip (CS#, OE#, WE#). Which the OE means output enabled (read) and WE means write enabled (write). See super easy to interface with) and it’s usually what’s used when folks proto circuits that need RAM. It doesn’t matter what your clock speed is nor how you probe the contents of the memory, all of it is non-destructive. But DRAM, is stupid cheap compared to SRAM and handles higher clocks a lot better.